Elissa Ogata

Physically, ECC memory differs from non-ECC memory (like what consumer laptop / desktop RAM uses) in that it has 9 memory chips instead of 8 (memory chips are used to store data that is sent to the CPU when summoned). ECC RAM’s bonus memory chip is used for error detection and correction among the other eight memory chips.

Systems running ECC memory are supposed to crash less. In 2014, Puget Systems ran benchmarks and found ECC memory had a 0.09 percent failure rate, compared to non-ECC memory’s 0.6 percent failure rate.

ECC memory targets enterprise-grade workloads, so most consumer PC motherboards either won’t support ECC RAM or will run it without its ECC function. To actually enjoy the benefits of ECC memory, you'll need a workstation / server level motherboard. ECC memory is also more expensive than non-ECC RAM because of its extra memory chip.

Again, ECC memory is geared toward enterprise-grade workstations and servers. As such, a similarly heavy-duty CPU is needed to support ECC memory. For Intel CPUs, only the Xeon line supports ECC, in an attempt to differentiate its enthusiast-level processors from enterprise-level ones. Meanwhile, AMD’s core-abundant Threadripper line supports ECC memory.

Perhaps surprisingly, ECC RAM is a touch slower than non-ECC RAM, since it takes extra time to check for errors. In that same 2014 study cited above, Puget found that ECC RAM was 0.25 percent slower than non-ECC RAM, with Registered ECC RAM being 0.44 percent slower (however, they determined the performance difference in non-ECC’s favor is “tiny.”)

Error correction code is a mathematical process that ensures the data stored in memory is correct. In the case of an error, ECC also allows the system to recreate the correct data in real time.

ECC uses a more advanced form of parity, which is a method of using a single bit of data (a parity bit) to detect errors in larger groups of data, such as the typical eight bits of data used to represent values in a computer memory system. Unfortunately, while a parity bit allows the system to detect an error, it doesn't provide enough information to correct the data error.

Most computing systems move data in larger chunks of 64 bits (referred to as a "word"). Instead of generating one extra parity bit for every eight bits of data, ECC generates seven extra bits per 64 bits of data. The system performs a complex mathematical algorithm on the extra seven bits of data to ensure the other 64 bits are correct. In the event of a single bit being incorrect (a single-bit error), the ECC algorithm can reconstitute the data, but it can only notify the system of larger errors (two or more bits).

ECC memory is not always registered / buffered. However, all registered memory is ECC memory.

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